The VPX3201 is a 3U OpenVPX™ board based around a Xilinx Kintex ® UltraScale™ FPGA. It is a cost-effective solution for building highly integrated systems with high-speed serial interfaces.
The VPX3201 has two banks of DDR4 memory, for a total of 8GB of RAM (default configuration). Each bank is 72-bit wide – 64-bits of data plus ECC. Depending on the application, each bank can be used separately, or chained together into one 128-bit wide data bus.
Using the front FMC slot, the card can be flexibly expanded with additional features as needed for a given application, such as storage, analogue or digital I/O. The FMC slot is VITA 57.1 compliant.
Optical backplane interconnect
The card is available with an optional rear optical module, for up to 50Gbit/s of optical data transfer to the backplane. This module is compatible with the VITA 66.5 standard and is connected to the FPGA via 4 GTH serial transceivers
Additional backplane interfaces
The backplane interface includes up to 8 PCIe Gen3 lanes (8 GT/s). These can be configured as 1x 8 lanes or as 2x 4 lanes. Furthermore 2 GTH serial interfaces are present. A switch chip can select 2 extra GTH serial interfaces, at the expense of PCIe lanes.
Additionally, a significant number of LVDS signals are routed from the FPGA directly to the backplane, for any other digital I/O needs